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Domain-Specific Computer Architectures for Emerging Applications

Machine Learning and Neural Networks
BuchGebunden
402 Seiten
Englisch
CRC Presserschienen am04.06.2024
This book explores the latest research in high performance domain-specific computer architectures for emerging applications, including Machine Learning and Neural Networks applications. The book discusses domain specific computing architectures and considers research issues related to the state-of-the art architectures in emerging domains.mehr
Verfügbare Formate
BuchGebunden
EUR134,50
E-BookPDF0 - No protectionE-Book
EUR60,99
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Produkt

KlappentextThis book explores the latest research in high performance domain-specific computer architectures for emerging applications, including Machine Learning and Neural Networks applications. The book discusses domain specific computing architectures and considers research issues related to the state-of-the art architectures in emerging domains.
Details
ISBN/GTIN978-0-367-37453-2
ProduktartBuch
EinbandartGebunden
FormatGenäht
Verlag
Erscheinungsjahr2024
Erscheinungsdatum04.06.2024
Seiten402 Seiten
SpracheEnglisch
MasseBreite 156 mm, Höhe 233 mm, Dicke 24 mm
Gewicht925 g
Artikel-Nr.14072229

Inhalt/Kritik

Inhaltsverzeichnis
Preface. 1 Overview of Domain-Specific Computing. 2 Machine Learning Algorithms and Hardware Accelerator Customization. 3 Hardware Accelerator Customization for Data Mining Recommendation Algorithms. 4 Customization and Optimization of Distributed Computing Systems for Recommendation Algorithms. 5 Hardware Customization for Clustering Algorithms. 6 Hardware Accelerator Customization Techniques for Graph Algorithms. 7 Overview of Hardware Acceleration Methods for Neural Network Algorithms. 8 Customization of FPGA-Based Hardware Accelerators for Deep Belief Networks. 9 FPGA-Based Hardware Accelerator Customization for Recurrent Neural Networks. 10 Hardware Customization/Acceleration Techniques for Impulse Neural Networks. 11 Accelerators for Big Data Genome Sequencing. 12 RISC-V Open Source Instruction Set and Architecture. 13 Compilation Optimization Methods in the Customization of Reconfigurable Accelerators Index.mehr

Autor

Dr. Chao Wang is a Professor with the University of Science and Technology of China, and also the Vice Dean of the School of Software Engineering. He serves as the Associate Editor of ACM TODAES and IEEE/ACM TCBB. Dr. Wang was the recipient of ACM China Rising Star Honorable Mention, and best IP nomination of DATE 2015, Best Paper Candidate of CODES+ISSS 2018. He is a senior member of ACM, senior member of IEEE, and distinguished member of CCF.