Produkt
KlappentextDescribes SystemVerilog language features relevant to functional verification. This book also specifies a standard set of libraries for assertions and commonly used verification functions, such as stimulus generation, simulation control and coverage analysis, to help implement the recommended methodology.
Zusammenfassung
New IEEE SystemVerilog standard explained
Covers the combination of methodology and SystemVerilog
Includes supplementary material: sn.pub/extras
New IEEE SystemVerilog standard explained
Covers the combination of methodology and SystemVerilog
Includes supplementary material: sn.pub/extras
Details
ISBN/GTIN978-0-387-25538-5
ProduktartBuch
EinbandartGebunden
Verlag
Erscheinungsjahr2005
Erscheinungsdatum28.09.2005
Seiten503 Seiten
SpracheEnglisch
Gewicht842 g
IllustrationenXVII, 503 p.
Artikel-Nr.10677106
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