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High Performance Integer Arithmetic Circuit Design on FPGA

Architecture, Implementation and Design Automation - Previously published in hardcover
BuchKartoniert, Paperback
114 Seiten
Englisch
Springererschienen am23.10.2016Softcover reprint of the original 1st ed. 2016
This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs).mehr
Verfügbare Formate
BuchGebunden
EUR106,99
BuchKartoniert, Paperback
EUR111,50
E-BookPDF1 - PDF WatermarkE-Book
EUR96,29

Produkt

KlappentextThis book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs).
Details
ISBN/GTIN978-81-322-3435-7
ProduktartBuch
EinbandartKartoniert, Paperback
Verlag
Erscheinungsjahr2016
Erscheinungsdatum23.10.2016
AuflageSoftcover reprint of the original 1st ed. 2016
ReiheSpringer Series in Advanced Microelectronics
Seiten114 Seiten
SpracheEnglisch
Gewicht215 g
IllustrationenXVII, 114 p. 56 illus.
Artikel-Nr.41401157

Inhalt/Kritik

Inhaltsverzeichnis
Introduction.- Architecture of Target FPGA Platform.- A Fabric Component based Design Approach for High Performance Integer Arithmetic Circuits.- Architecture of Data path Circuits.- Architecture of Control path Circuits.- Compact FPGA Implementation of Linear Cellular Automata.- Design Automation and Case Studies.- Conclusions and Future Work.mehr

Autor

Ayan Palchaudhuri is a Ph.D. student in the Department of Electronics and Electrical Communication Engineering (E&ECE) of Indian Institute of Technology (IIT) Kharagpur. He has received the M.S. degree from the Department of Computer Science and Engineering (CSE), IIT Kharagpur, in 2015. He has over two-and-a-half years of work experience as a Junior Project Assistant in the Department of CSE, IIT Kharagpur. His research interests include VLSI Architecture Design and Computer Arithmetic. He is the co-author of two conference papers, one journal, one book chapter and a patent has been filed based on his research work. His research work has been recognized with the Best Poster Award in the Student Research Symposium of the 21st IEEE International Conference on High Performance Computing (HiPC) 2014.

Rajat Subhra Chakraborty is Assistant Professor in the Computer Science and Engineering Department of Indian Institute of Technology Kharagpur. He has a Ph.D. in Computer Engineering from Case Western Reserve University (Ohio, U.S.A.) and a B.E. (Hons.) in Electronics and Telecommunication Engineering from Jadavpur University (India) in 2005. He has work experience at National Semiconductor and AMD. His research interests include: Hardware Security, VLSI Design and Design Automation and Reversible Watermarking for digital content protection. He is the co-author of two published books, four book chapters and over 50 publications in international journals and conferences of repute. He is one of the recipients of the "IBM Faculty Award" for 2012, and a "Royal Academy of Engineering (U.K.) Fellowship" in 2014. He holds 1 U.S. patent, and 2 more international patents and 3 Indian patents have been filed based on his research work. Dr. Chakraborty is a member of IEEE and ACM.
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